Quad-Thread Core

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The QuadThreadX16X32 model supports four processes running simultaneously and has four hardware resources to do this. Two threads have an architecture and, accordingly, a set of instructions X16 and two threads have an architecture X32. Access to a shared memory resource is supported by an access arbiter. Thread priorities change with each next transaction. Priority rotation provides the same bus system throughput for each thread. The same arbiters with priority rotation are installed on transaction multiplexers located at the inputs of the streams controller and the frames processing unit of the multiprocessor network. The context controller and messenger have firmware different from that used in single-thread cores. These controllers are a common resource for four threads. When processing an automatic process switch, the context controller searches for free thread of the required type and, if there are any, starts the next process on a free thread.The context controller also selects the thread with the desired architecture when the procedure, message, or interrupt handler starts.