C sources compilation

Compilation of programs written in C is carried out in three stages.

  1. C source code is compiled with the free LLVM Clang compiler. Link to LLVM developers team resource http://www.llvm.org/ The Clang compiler generates a program consisting of LLVM assembler instructions.  LLVM-assembler is an abstract, platform-independent assembler.
  2. Using the llvm2assm utility, the program recorded in the LLVM assembler instructions is translated into the assembler text of the program using the basic instruction set of the MyCORES processors. The resulting assembler text can be supplemented with code inserts using machine instructions added to the processor to support specific data processing units.
  3. The final stage of compiling the program is performed using the reconfigurable CAssm compiler. CAssm generates binaries in the MyCORES cores instruction set.

The binary files obtained as a result of compilation must be provided with a header describing some process parameters. This header is generated using a tool called CPUObserver. The generated object file containing the process header and binary machine code can be loaded into the target platform, written to SPI Flash, launched for execution in real time, or launched in debug mode.



CPUObserver is the main tool used for:

  • debugging applications in step mode and using breakpoints;
  • preparing the microprocessor system for autonomous operation;
  • monitoring the current state of the system:
  • download and upload data and software;
  • evaluation of system performance.

CPUObserver is a Widows-based application. 

FTDI's USB <-> UART solution is used to connect to the target platform. The data transfer rate is 921600 bps.

Minimum system configuration for getting started: FPGA such as EP2AGX125, SPI Flash and FTDI USB <-> UART converter.

CPUObserver communicates with KERNEL, which is executed on the target platform via a command interface. All KERNEL commands are transmitted in text form and can be entered manually. Data can be transmitted both in text form and in binary form.

CPUObserver supports both single-core and multi-core target platforms. Allows you to assign processes to run for each core of the system.

In the multicore system, the root kernel receives commands directly through the debug UART port. All other cores exchange information with the CPUObserver in transit through the root core. For the transit of commands and data between the root core and other cores, hardware streams are used.

Configurable assembler

Windows-based application, which is used as the main tool for generating binary code from source assembly text. CAssm is used to generate binary code not only for processor software, but also for generating microcode binary files for firmware context controllers and messenger.

The main property of CAssm is its customizability to the desired system of instructions or microinstructions.

The configuration of the instruction set, instruction format, instruction opcodes, instruction field codes and the corresponding mnemonics are described by a special structure in the source files.



Kernel is a system software that resides in a memory buffer inside an FPGA chip, and is placed there when compiling an FPGA project. The main functions of Kernel are as follows.

  1. System initialization at the start and loading from the external SPI Flash processes specified for execution.
  2. Support for interaction with the host system and CPUObserver to monitor the state of the system and debug the software in the step mode  and/or using breakpoints.
  3. CPUObserver support when loading processes, launching them for execution, deleting processes, and also when CPUObserver works with the file system.
  4. Service maintenance of application processes through a set of service procedures.
  5. Maintenance of the descriptor table, which consists in defragmenting free blocks of memory that are formed when objects are freed by processes.
  6. Support for a file system organized in an external Flash, working with which is done using the built-in SPI controller.